1. Field of the Invention
The present invention generally relates to a semiconductor device and method of manufacture thereof, and more particularly to a semiconductor device and method of manufacture thereof, which includes a column electrode having one end connected to a wiring layer on a semiconductor chip and having the other end connected to an external connection terminal.
2. Description of the Related Art
In recent years, the CSP (chip size package) has come to be increasingly used as a semiconductor device mounted on a small-sized electronic device represented by a portable digital electronic device, such as a cellular phone.
Miniaturization and high density can be attained with the CSP type semiconductor device. However, in recent years, the pitch between the external connection terminals is in the tendency that it becomes narrower with the demand for further miniaturization of the semiconductor device.
Thus, since the bonding area of the electrode formed in the mounting substrate and the external connection terminal of the semiconductor device becomes small as the external connection terminal pitch becomes narrow, the mounting reliability of the semiconductor device on the mounting substrate will decline.
In order to avoid the problem, a semiconductor device in which the column electrode is formed between the semiconductor chip and the external connection terminal is devised (for example, see Japanese Laid-Open Patent Application No. 2002-270721 and Japanese Laid-Open Patent Application No. 2001-291733).
It is known that, in the semiconductor device having the column electrode, the stress present in the column electrode and the surrounding resin layer at the time of mounting can be relaxed or absorbed, and the mounting reliability is excellent when compared with the semiconductor device having no column electrode.
FIG. 1 and FIG. 2 show examples of the conventional semiconductor device having the column electrode.
The semiconductor device 1A shown in FIG. 1 includes the insulating film 3, such as polyimide, which is formed on the circuit formation surface of the semiconductor chip 2A, and the wiring layer 4 (re-wiring layer) which is formed on the insulating film 3.
The wiring layer 4 is electrically connected with the semiconductor chip 2A through the hole formed in the insulating film 3. The column electrode 5 is formed in the state where it is set on the wiring layer 4.
The column electrode 5 has the cylindrical configuration. In the composition of FIG. 1, the upper end of the column electrode 5 is bonded to the wiring layer 4, and the solder ball 7 which serves as the external connection terminal is arranged at the lower end through the barrier metal 6 (for example, Ni and Au plating).
Moreover, the encapsulation resin 8 is formed on the bottom of the semiconductor chip 2A. The encapsulation resin 8 functions to protect the wiring layer 4 and the column electrode 5, and is formed, in the composition of FIG. 1, to have a thickness that is large enough to encapsulate the whole column electrode 5 except for the lower end where the barrier metal 6 is formed.
For this reason, in the structure of the conventional semiconductor device 1A, the end of the column electrode 5 where the barrier metal 6 is formed is flush with the surface of the encapsulation resin 8, and it is the structure in which the solder ball 7 and the encapsulation resin 8 are not separate from each other.
On the other hand, the semiconductor device 1B shown in FIG. 2 is the semiconductor device which receives or outputs the high frequency signal.
In FIG. 2, the elements that are essentially the same as corresponding elements in FIG. 1 are designated by the same reference numerals and a description thereof will be omitted.
Moreover, shown in FIG. 2 is the condition in which the semiconductor device 1B is mounted on the mounting substrate 10, and, the column electrodes 5 and 5A are bonded to the connection electrodes 11 and 11A of the mounting substrate 10 through the solder balls 7.
As mentioned above, the semiconductor device 1B is provided for the high-frequency signal transmission, and the column electrode 5A and the connection electrode 11A with which the high-frequency signal is exchanged are smaller in size than the column electrode 5 and the connection electrode 11 for the parasitic-capacitance reduction between the semiconductor chip 2B and the wiring layer 4 (re-wiring). In FIG. 2, reference numeral 9 indicates the passivation film.
In the semiconductor devices 1A and 1B of FIG. 1 and FIG. 2, the stress present at the time of mounting can be relaxed or absorbed by the column electrodes 5 and 5A and the surrounding encapsulation resin 8, and the improvement in the mounting reliability can be aimed at.
However, in this connection, if the further miniaturization and high density of the semiconductor devices 1A and 1B progress and the adoption of smaller pitch of the solder balls 7 (external connection terminals) progresses further, the decline of the mounting reliability will be produced similarly even with the semiconductor devices 1A and 1B using the column electrodes 5 and 5A.
Moreover, the problem arises in that the reduction of the distance of the adjoining column electrodes 5 and 5A by the adoption of smaller pitch will easily cause the occurrence of the short circuiting (bridging) between the adjoining solder balls 7 at the time of arranging the solder balls 7 in the column electrodes 5 and 5A and at the time of bonding the column electrodes 5 and 5A to the connection electrodes 11 and 11A of the mounting substrate 10.
Especially when the solder is used as a material of the external connection terminal as shown in FIG. 1 and FIG. 2, in the composition in which the tips of the column electrodes 5 and 5A and the surface of the encapsulation resin 8 are almost flush with each other, the solvent component in the solder flows on the surface of the encapsulation resin 8 at the time of heating, and it is easily in contact with the adjacent column electrodes 5 and 5A. Since the solvent component have good wettability to the solder, the short circuiting of the adjoining column electrodes 5 and 5A with the solder balls 7 will be caused by the contact of the solvent component as a result.
Furthermore, in the composition in which the encapsulation resin 8 encapsulates the whole column electrodes 5 and 5A (except for the tips thereof), the thickness of the semiconductor devices 1A and 1B of FIG. 1 and FIG. 2 is comparatively large.
For this reason, there is the problem in that the difference of the thermal expansion occurs between the silicon of the semiconductor chips 2A and 2B and the encapsulation resin 8 having a coefficient of thermal expansion different from that of the silicon, and the occurrence of the curvature will be easily produced in the semiconductor devices 1A and 1B.